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Instruction sets: Arm, RISC-V, x86 and others

The instruction set is the language a processor understands. Who owns it, and who can build chips with it, shapes everything around it.

Foundation

Read firstMicrocontroller or microprocessor?
Who owns each instruction set, and who builds chips with it Arm designs cores in three profiles and licenses them to many chip vendors. RISC-V is an open standard anyone may implement without an ISA licence fee, with their own core design or a licensed one. Intel and AMD design and sell their own x86-64 chips. Xtensa is owned by Cadence; MIPS moved its new designs to RISC-V. Who defines it Who builds chips with it Arm designs cores, licenses them A apps R real-time M MCUs Cortex profiles licence Vendor 1 Vendor 2 Many more Many companies ship chips built on the same Arm cores. Since 2026, Arm also sells one data-centre CPU of its own. RISC-V open standard Kept by RISC-V International RVA23 (2024): baseline for app processors no ISA licence fee Anyone may implement it own design, or a licensed core A ready-made core design may still be sold under licence. x86-64 Intel and AMD design their own Their own chips where PC software and speed matter most Also: Xtensa, owned by Cadence, in some Wi-Fi microcontrollers. MIPS, an older architecture in billions of shipped chips; its company moved new designs to RISC-V in 2022.
Arm licenses its cores to many chip makers, RISC-V can be implemented by anyone without an instruction-set licence fee, and Intel and AMD design and sell their own x86-64 chips.

Key points

  1. Arm defines three architecture profiles, each implemented by a Cortex family: A-profile (Cortex-A) for application processors running rich operating systems, R-profile (Cortex-R) for real-time systems, and M-profile (Cortex-M) for microcontrollers.12
  2. Arm designs processor cores and licenses them to chip vendors, so many companies ship chips built on the same Arm cores. For most of its history Arm sold no chips of its own; in March 2026 it launched its first, a data-centre CPU.34as of 6 October 2026
  3. RISC-V is an open instruction set standard maintained by RISC-V International; anyone may implement it without paying an ISA licence fee, though individual core designs may still be commercially licensed.5
  4. RVA23, ratified in October 2024, is the RISC-V application-processor profile that sets a common baseline of extensions (including vector) for operating systems and software to target.6
  5. Xtensa is a configurable processor architecture whose instruction set is owned by Cadence. It is the main CPU in some Wi-Fi microcontrollers, although at least one major Wi-Fi MCU family has moved its newer chips to RISC-V.789
  6. x86-64 processors from Intel and AMD are used in embedded systems where PC software compatibility, high performance or virtualisation matter more than power or cost.1011
  7. MIPS is an older architecture found in billions of shipped chips. The company behind it switched its new processor designs to RISC-V in 2022, and was acquired by GlobalFoundries in August 2025.121314as of 6 October 2026

Sources

  1. CPU Architecture: A-profile, R-profile and M-profile · Arm · Vendor page
  2. Armv7-M Architecture Reference Manual (DDI0403E.e) · Arm · Reference
  3. Arm licensing models · Arm · Vendor page
  4. Arm expands compute platform to silicon products in historic company first · Arm · News
  5. About RISC-V International · RISC-V International · Standard
  6. RISC-V Announces Ratification of the RVA23 Profile Standard · RISC-V International · News
  7. Overview of Xtensa ISA · Espressif · Reference
  8. ESP32-S3 datasheet · Espressif · Datasheet
  9. ESP32-C6 datasheet · Espressif · Datasheet
  10. Intel Atom x7425E Processor · Intel · Vendor page
  11. AMD Ryzen Embedded Family · AMD · Vendor page
  12. MIPS Corporate Overview · MIPS · Vendor page
  13. MIPS Pivots to RISC-V with Best-In-Class Performance and Scalability · MIPS · News
  14. GlobalFoundries Completes Acquisition of MIPS · GlobalFoundries · News