# Bare metal: the super-loop and interrupts

The simplest firmware is a main loop and a few interrupt handlers, with no operating system. It handles more than you might expect.

Page: https://dharanova.com/learn/bare-metal · Track: Run · Level: Foundation · Facts last checked 6 October 2026

Read first: [Microcontroller or microprocessor?](https://dharanova.com/learn/mcu-vs-mpu.md)

Diagram: Top: a super-loop with no operating system: poll inputs, do work, repeat. Bottom: a timeline with three lanes. The main loop runs until a hardware event switches to the low-priority interrupt handler, which captures data and sets a flag. A higher-priority interrupt pre-empts that handler, as the NVIC on Cortex-M chips allows, then returns to it. The handler finishes and the main loop resumes, sees the flag and processes the data. A note says a long handler delays every other interrupt of equal or lower priority.

## Key points

1. A bare-metal program runs one main loop that polls inputs and does work in turn, with no operating system; interrupts let hardware events pre-empt the loop. [1]
2. Arm Cortex-M cores include a Nested Vectored Interrupt Controller (NVIC), which lets a higher-priority interrupt pre-empt a lower-priority one that is already running. [2]
3. Interrupt handlers should do the minimum, such as capturing data and setting a flag, and leave processing to the main loop; long handlers delay every other interrupt of equal or lower priority. [3][4][2][1]

## Common mistakes

- Sharing a variable between an interrupt and the main loop without protecting it, then chasing a bug that shows up once a day.

## Where to go next

- [Real-time operating systems](https://dharanova.com/learn/rtos.md): An RTOS adds tasks, priorities and predictable scheduling to a microcontroller, so deadlines can be met. Real-time means predictable timing, not raw speed.
- [Debug probes and bench instruments](https://dharanova.com/learn/debugging-hardware.md): Tools for seeing inside a running chip and on the wires around it: JTAG, SWD, GDB, logic analysers and oscilloscopes.

## Sources

1. [Building Bare-Metal ARM Systems with GNU (foreground/background architecture)](https://www.state-machine.com/doc/Building_bare-metal_ARM_with_GNU.pdf), Quantum Leaps (Miro Samek)
2. [Armv7-M Architecture Reference Manual (DDI 0403E.b), B1.5.4 and B3.4](https://documentation-service.arm.com/static/5f8fef3af86e16515cdbf816), Arm
3. [FreeRTOS: Deferred interrupt handling](https://www.freertos.org/Documentation/02-Kernel/02-Kernel-features/11-Deferred-interrupt-handling), FreeRTOS (AWS)
4. [Mastering the FreeRTOS Real Time Kernel (FreeRTOS Kernel Book)](https://github.com/FreeRTOS/FreeRTOS-Kernel-Book), FreeRTOS (AWS)